Design of Two-point Modulation Phase-locked Loop for Polar Transmitter

被引：0
|
作者：
Liang Z. [1 ,2 ]
Li B. [1 ]
Huang M. [1 ]
Xu K. [2 ]
Ye H. [2 ]
机构：
[1] School of Electronic and Information Engineering, South China University of Technology, Guangzhou, 510640, Guangdong
[2] Rising Micro Electronics Co., Ltd., Guangzhou, 510006, Guangdong
来源：
Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science) | 2019年 / 47卷 / 02期
基金：
中国国家自然科学基金;
关键词：
Bluetooth transmitter; Phase-locked loop; Polar modultion; Two-point modulatioin; Voltage controlled oscillator;
D O I：
10.12141/j.issn.1000-565X.180218
中图分类号：
学科分类号：
摘要：
Two-point modulation phase-locked loop (PLL) for Bluetooth polar transmitter was studied and designed by using 0.11μm 1P6M CMOS process. In order to correct the loop gain of two phase modulation paths in the PLL and reduce the frequency shift keying error of using the phase-locked loop, a new gain correction method was proposed. And a new phase-locked loop circuit of two-point modulation based on gain calibration was proposed to reduce phase noise of PLL and accelerate the locking time of phase-locked loop. Chip measured results show that when voltage controlled oscillator oscillates at 4.8GHz, the phase noises at 10kHz, 1MHz, 3MHz offsets are -83dBc/Hz, -108dBc/Hz and -114dBc/Hz, respectively. When using the polar transmitter of phase-locked loop to transmit the 0dBm signal, the FSK error is 2.97%, and the phase-locked loop occupies 0.32mm2. The overall performance meets the requirements of Bluetooth RF chip test specification. © 2019, Editorial Department, Journal of South China University of Technology. All right reserved.
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页码：9 / 15
页数：6
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