共 50 条
- [31] Reliability vs. Security: Challenges and Opportunities for Developing Reliable and Secure Integrated Circuits [J]. 2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016,
- [32] Implementation of concurrent checking circuits by independent sub-circuits [J]. DFT 2005: 20TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, 2005, : 343 - 351
- [33] Towards formal verification of cryptographic circuits: A functional approach [J]. 2018 3RD INTERNATIONAL CONFERENCE ON PATTERN ANALYSIS AND INTELLIGENT SYSTEMS (PAIS), 2018, : 158 - 163
- [34] Symbolic security of garbled circuits [J]. IEEE 31ST COMPUTER SECURITY FOUNDATIONS SYMPOSIUM (CSF 2018), 2018, : 147 - 161
- [35] Algorithms for enumerating circuits in matroids [J]. ALGORITHMS AND COMPUTATION, PROCEEDINGS, 2003, 2906 : 485 - 494
- [36] Security constraints in integrated circuits [J]. 11th IEEE International On-Line Testing Symposium, 2005, : 117 - 117
- [37] Security evaluation of asynchronous circuits [J]. CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS CHES 2003, PROCEEDINGS, 2003, 2779 : 137 - 151
- [38] Implementation of Lightweight Cryptographic Algorithms in FPGA [J]. 2017 2ND INTERNATIONAL CONFERENCE ON CIRCUITS, CONTROLS, AND COMMUNICATIONS (CCUBE), 2017, : 232 - 235