Power-Constrained Pattern Design of Reconfigurable Intelligent Surfaces

被引:1
|
作者
Prasad, Narayan [1 ]
Yapici, Yavuz [1 ]
Luo, Tao [2 ]
Li, Junyi [1 ]
Gaal, Peter [2 ]
机构
[1] Qualcomm Technol Inc, Bridgewater, NJ 08807 USA
[2] Qualcomm Technol Inc, San Diego, CA 92121 USA
关键词
Algorithm design; discrete optimization; energy efficiency; finite alphabet; optimality; pin-diode; RIS;
D O I
10.1109/LWC.2023.3340650
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Reconfigurable Intelligent Surface (RIS) has been conceptualized as a surface with several antenna elements that can each be programmed to reflect impinging EM waves after imparting a chosen phase shift. One promising avenue to realize a lower-cost RIS, that can mitigate coverage blind-spots arising in millimeter-wave (mmWave) networks, is based on using PIN-diodes. The collective power drawn then by the set of ON diodes at a RIS will not be negligible but has hitherto not been considered. In this paper we show that the novel problem of power budget constrained pattern design for such PIN-diode based RIS can be optimally solved in polynomial time for practical binary alphabets, and design efficient algorithms offering very significant gains over a static sub-sampled benchmark. We further demonstrate that an energy efficient pattern design problem can be optimally and efficiently solved. Our analysis also reveals the tradeoffs between pattern directivity and RIS consumed power under near and far field regimes.
引用
收藏
页码:716 / 720
页数:5
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