On-chip cache design method for cooperative memory compilation and layout

被引：0
|
作者：
Liu, Biwei [1 ]
Xiong, Qi [2 ]
Yang, Ming [3 ]
Song, Yulu [3 ]
机构：
[1] College of Computer Seienee and Technology, National University of Defense Technology, Changsha,410073, China
[2] College of Sciences, National University of Defense Technology, Changsha,410073, China
[3] College of Basic Education, National University of Defense Technology, Changsha,410073, China
来源：
Guofang Keji Daxue Xuebao/Journal of National University of Defense Technology | 2024年 / 46卷 / 01期
关键词：
Aspect ratio - Cache memory - Design - Random access storage;
D O I：
10.11887/j.cn.202401021
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：198 / 203
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