DEMONSTRATING ELECTRICAL CONNECTION ON RECONSTITUTED ASIC CHIPS ON 8-INCH SILICON WAFER

Wafer reconstitution entails the assembly of dies from multiple sources onto a wafer by die to wafer attach [1-4]. This reconstituted wafer can then be used as a standard substrate for further processing, e.g., in a CMOS foundry. This paper reports a solution to fan-out both microfluidics [5] and electronics using wafer reconstitution. This work solves both the incompatibility between application specific integrated circuit (ASIC) chips (of minimal size, mostly in silicon) and microfluidic chips (of larger size, mostly in glass or polymer), proving the feasibility of wafer reconstruction as an integration process flow for various microfluidic and life sciences applications.