RISE TIME OPTIMIZATION OF HIGH-SPEED DIGITAL FANOUT CIRCUITS

被引：0

作者：

BARNA, A

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1969年 / SC 4卷 / 03期

关键词：

D O I：

10.1109/JSSC.1969.1049978

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：159 / &

共 50 条

[21] HIGH-SPEED GALLIUM-ARSENIDE FOR DIGITAL INTEGRATED-CIRCUITS
MERRETT, RP
ELECTRONICS AND POWER, 1987, 33 (04): : 241 - 244
[22] THE APPLICATION OF HIGH-SPEED DIGITAL CIRCUITS TO RADAR PULSE-MODULATION
RICKETT, BS
GOLDER, M
EVENDEN, DC
19TH EUROPEAN MICROWAVE CONFERENCE : MICROWAVE 89, 1989, : 845 - 850
[23] Basic Circuits for Digital, Bipolar High-Speed IC's.
Martiny, Ingo
Elektronik Munchen, 1987, 36 (19): : 140 - 146
[24] SQUARE-ROOTING ALGORITHMS FOR HIGH-SPEED DIGITAL CIRCUITS.
Majerski, Stanislaw
IEEE Transactions on Computers, 1985, C-34 (08) : 724 - 733
[25] The Impact of Guard Trace with Open Stub on Time-Domain Waveform in High-Speed Digital Circuits
Chiu, Po-Wei
Shiue, Guang-Hwa
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, 2009, : 219 - +
[26] GROUND PIN OPTIMIZATION IN HIGH-SPEED DIGITAL-SYSTEMS
CUTLER, RD
VLSI SYSTEMS DESIGN, 1986, 7 (03): : 46 - 48
[27] Design and optimization of a typical high-speed digital transmission channel
Xia, F.
Fang, D. G.
CEEM' 2006: ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS, VOLS 1 AND 2, PROCEEDINGS, 2006, : 185 - +
[28] OPTIMIZATION OF SATELLITE LINK LENGTHS FOR HIGH-SPEED DIGITAL DATA
GREBELSKIY, MD
PANKOV, GI
TSIRLIN, VM
TELECOMMUNICATIONS AND RADIO ENGINEERING, 1979, 33-4 (12) : 8 - 9
[29] CHARACTERIZING HIGH-SPEED DIGITAL CIRCUITS - A JOB FOR WIDE-BAND SCOPES
LEVIT, LB
VINCELLI, ML
EDN, 1993, 38 (12) : 153 - &
[30] Optimized Biasing Technique for High-Speed Digital Circuits with Advanced CMOS Nanotechnology
Wang, Bo
Chen, Dianyong
Liang, Bangli
Kwasniewski, Tad
2008 1ST MICROSYSTEMS AND NANOELECTRONICS RESEARCH CONFERENCE, 2008, : 181 - 184

← 1 2 3 4 5 →