共 50 条
- [2] A NEW MODEL FOR THE HIGH-LEVEL DESCRIPTION AND SIMULATION OF VLSI NETWORKS [J]. 26TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, 1989, : 738 - 741
- [3] Methods for Changing Parallelism in the Process of High-Level VLSI Synthesis [J]. Automatic Control and Computer Sciences, 2023, 57 : 696 - 705
- [6] High-level power estimation of VLSI systems [J]. ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 1804 - 1807
- [10] High-level area and power estimation for VLSI circuits [J]. 1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS, 1997, : 114 - 119