PERFORMANCE OF HYPERCUBE ARCHITECTURE WITH SHARED-MEMORY

被引:0
|
作者
TIRUVEEDHULA, V
BEDI, JS
机构
[1] Department of Electrical and Computer Engineering, Wayne State University, Detroit, MI
关键词
D O I
10.1080/00207729408928990
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The performance of hypercube architectures depends on the topology of the problem being solved. Specifically, they are unsuitable for knowledge-based applications where global data access is very often required. In this work. a new architecture is proposed that can be used in such applications. The proposed architecture uses both the shared memory and the distributed memories. In this architecture, shared memory is connected to the basic hypercubes using multistage interconnection networks (MINs). In this analysis, the Omega network is considered. When global memory and distributed memories are used, multiple copies of shared data deteriorate the system performance because of data invalidation traffic in the network, and the coherency implementation overhead. Maintaining single copies of the shared data can eliminate the invalidation traffic and the coherency related activities. However, the single copies are to be dynamically moved using a data movement policy to serve the memory references. Analytical modelling of data movement policies is developed using Markov chains. The performance measures of the proposed architecture are compared with that of hypercube architecture. The analysis includes measures for the proposed architecture with different basic hypercube sizes and compares them. In all cases, these measures demonstrate that the architecture is better than the traditional hypercube architecture for any given number of processing elements.
引用
收藏
页码:695 / 705
页数:11
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