FAULT TOLERANCE IN N-MOS RANDOM-ACCESS MEMORIES WITH DYNAMIC REDUNDANCY METHODS

被引:1
|
作者
NAIDU, RV
MAHAPATRA, S
机构
来源
MICROELECTRONICS AND RELIABILITY | 1988年 / 28卷 / 02期
关键词
D O I
10.1016/0026-2714(88)90350-2
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:193 / 200
页数:8
相关论文
共 50 条
  • [1] SCHEMES OF DYNAMIC REDUNDANCY FOR FAULT TOLERANCE IN RANDOM-ACCESS MEMORIES
    GROSSPIETSCH, KE
    [J]. IEEE TRANSACTIONS ON RELIABILITY, 1988, 37 (03) : 331 - 339
  • [2] SEMICONDUCTOR MEMORIES . MOS RANDOM-ACCESS MEMORIES
    ROOP, D
    [J]. ELECTRONIC PRODUCTS MAGAZINE, 1970, 12 (10): : 96 - &
  • [3] A FAULT MODEL FOR MULTIVALUED NMOS DYNAMIC RANDOM-ACCESS MEMORIES
    NAIDU, RV
    MAHAPATRA, S
    [J]. MICROELECTRONICS AND RELIABILITY, 1989, 29 (02): : 137 - 143
  • [4] DIAGNOSTIC TESTING OF MOS RANDOM-ACCESS MEMORIES
    RICHARDSON, WS
    [J]. SOLID STATE TECHNOLOGY, 1975, 18 (03) : 31 - 34
  • [5] POWER REDUCTION METHODS FOR NMOS DYNAMIC RANDOM-ACCESS MEMORIES
    NAIDU, RV
    MAHAPATRA, S
    [J]. MICROELECTRONICS AND RELIABILITY, 1988, 28 (06): : 877 - 883
  • [6] HIGH-SPEED 16-KBIT N-MOS RANDOM-ACCESS MEMORY
    ITOH, K
    SHIMOHIGASHI, K
    CHIBA, K
    TANIGUCHI, K
    KAWAMOTO, H
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (05) : 585 - 590
  • [7] MOS COURSE .5. MOS RANDOM-ACCESS MEMORIES
    CREWS, W
    [J]. ELECTRONIC ENGINEER, 1970, 29 (06): : 66 - &
  • [8] MEMORIES .10. MOS RANDOM-ACCESS ARRAYS
    TUNZI, BR
    [J]. ELECTRONICS, 1969, 42 (02): : 102 - &
  • [9] RANDOM-ACCESS MEMORIES
    CHAMBERLIN, DC
    [J]. ELECTRONIC PRODUCTS MAGAZINE, 1981, 23 (10): : 45 - &
  • [10] Dynamic random-access memories without sense amplifiers
    Sharroush, S. M.
    Abdalla, Y. S.
    Dessouki, A. A.
    El-Badawy, E. -S. A.
    [J]. ELEKTROTECHNIK UND INFORMATIONSTECHNIK, 2012, 129 (02): : 88 - 101