共 50 条
- [21] Spintronic logic circuit design for nanoscale computation ICECS 2004: 11TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, 2004, : 195 - 198
- [22] A CMOS design style for logic circuit hardening 2005 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 43RD ANNUAL, 2005, : 223 - 229
- [24] Combinational circuit design using Nanomagnetic logic 2014 INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION AND EMBEDDED SYSTEMS (ICICES), 2014,
- [25] Probabilistic Design in Spintronic Memory and Logic Circuit 2012 17TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2012, : 323 - 328
- [26] Scaling effects in combinational logic circuit design INFORMATION-AN INTERNATIONAL INTERDISCIPLINARY JOURNAL, 2007, 10 (05): : 695 - 702
- [27] A Design of PUF Circuit Using Adiabatic Logic 2024 IEEE THE 20TH ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS 2024, 2024, : 595 - 598
- [28] Package design and PI simulation of AC-DC circuit 2022 23RD INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2022,
- [29] Design and Development of Tiny Package for High Voltage Integrated Circuit Device (HVIC) in QFN Package 2014 IEEE 36TH INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY CONFERENCE (IEMT), 2015,
- [30] Computational design and analysis of nanoscale logic circuit molecules COMPUTATIONAL STUDIES, NANOTECHNOLOGY, AND SOLUTION THERMODYNAMICS OF POLYMER SYSTEMS, 2001, : 159 - 170