AN EFFICIENT MULTILAYER DIAGONAL ROUTER FOR MULTITERMINAL PRINTED-CIRCUIT BOARDS

This paper presents a grid-based multi-layer, multi-terminal autorouter with the unique feature of diagonal routing. The router is suitable for routing memory boards and highly congested printed circuit boards. Diagonal routing is extremely useful in minimizing vias and in obtaining a high rate of completion with total route length reduced by up to 20% comparatively. The router employs an improved maze algorithm to incorporate multi-layer diagonal routing. The cost function used in the algorithm is complicated, but can be easily modified to meet specific needs. The algorithm models multi-terminal routing as a minimum spanning tree problem to use the least amount of wiring which is most desirable in the electronic industry. Intelligent net ordering and dynamic data structures reduce memory requirement and total route time by up to 30% compared to recently developed routers. The algorithm described in this paper was extensively tested against standard benchmarks and very inspiring results were achieved.