GAAS-MESFET DIFFERENTIAL PASS-TRANSISTOR LOGIC

被引：1
|
作者：
PASTERNAK, JH
SALAMA, CAT
机构：
[1] Department of Electrical Engineering, University of Toronto, Toronto
来源：
ELECTRONICS LETTERS | 1990年 / 26卷 / 19期
关键词：
Logic devices;
D O I：
10.1049/el:19901023
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A GaAs MESFET implementation of differential passtransistor logic (DPTL) is presented. This logic technique combines the greater area efficiencies and high operation speeds of ratioless, pass-transistor circuits with the additional advantages of good noise immunity and low power dissipation. Experimental results are provided for a four-bit counter implemented in a 1μm, depletion (D)-mode MESFET technology to demonstrate both the functionality and noise immunity of GaAs DPTL. © 1990, The Institution of Electrical Engineers. All rights reserved.
引用
收藏
页码：1597 / 1598
页数：2
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