BUILT-IN SELF-TEST OF THE MACROLAN CHIP

The authors describe the implementation of self-test in the Medium Access Controller chip for Macrolan, a fiber-optic, local-area network. The test style for 80% of the chip’s combinational logic is quasiexhaustive testing. This approach, despite its apparent inefficiency in terms of the number of patterns used, gives considerable flexibility to the designer in arranging linear-feedback shift registers and so is easier to implement than some other techniques. The chip also uses a form of random-pattern test, not normally considered for memory testing, instead of a specialized pattern generator. The ICL team implemented BIST without using fault simulation or approximate testability measures. © 1990 IEEE