A NOVEL ASIC DESIGN APPROACH BASED ON A NEW MACHINE PARADIGM

This paper introduces a new design methodology for rapid implementation of cheap high-performance ASIC's. The method described here derives from high-level algorithm specifications or from high-level source programs not only the target hardware, but (in contrast to silicon compilers) at the same time also the machine code to run it. The new method is based on a novel sequential machine paradigm where execution is used (being orders of magnitude more efficient) instead of simulation and where programmers may do the design job, rather than real hardware designers. The paper illustrates that for a very large class of commercially important algorithms (DSP, graphics, image processing and many others) this paradigm is orders of magnitude more efficient than the von Neumann paradigm. Compared to von-Neumann-based implementations, acceleration factors of up to more than 2000 have been obtained experimentally. The performance of ASIC's obtained by this new methodology is mostly competitive with ASIC designs obtained in the much slower and much more expensive "traditional" way. As a byproduct the new methodology also supports the automatic generation of universal accelerators for coprocessor use in workstations, etc., such as, e.g., to accelerate EDA tools. It is the goal of this paper to explain the highly efficient application of the xputer paradigm, rather than to introduce its hardware implementation. It is the goal of this paper to illustrate the innovative power of this paradigm, and its potential as a major step in progress toward systematically deriving ASIC designs from algorithm specifications.