HARDWARE IMPLEMENTATION OF A PARALLEL NOISE CLEARING ALGORITHM

被引:0
|
作者
ATIQUZZAMAN, M [1 ]
机构
[1] KING FAHD UNIV PETR & MINERALS,DEPT ELECT ENGN,DHAHRAN 31261,SAUDI ARABIA
来源
MICROPROCESSING AND MICROPROGRAMMING | 1989年 / 26卷 / 02期
关键词
D O I
10.1016/0165-6074(89)90263-9
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
下载
收藏
页码:119 / 128
页数:10
相关论文
共 50 条
  • [21] Analysis and Low-power Hardware Implementation of a Noise Reduction Algorithm
    Wang, Ang
    Yu, Lina
    Lan, Yuyan
    Zhou, Weixin
    Xiao, Wanang
    2021 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE BIG DATA AND INTELLIGENT SYSTEMS (HPBD&IS), 2021, : 22 - 26
  • [22] Design and implementation of static Huffman encoding hardware using a parallel shifting algorithm
    Lee, T
    Park, J
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2004, 51 (05) : 2073 - 2080
  • [23] A HARDWARE IMPLEMENTATION OF A NEURAL-NETWORK USING THE PARALLEL PROPAGATED TARGETS ALGORITHM
    SMITH, AVW
    SAKO, H
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1994, E77D (04) : 516 - 527
  • [24] Optimising parallel programs for hardware implementation
    Coutinho, JGF
    Luk, W
    Weinhardt, M
    RECONFIGURABLE TECHNOLOGY: FPGAS AND RECONFIGURABLE PROCESSORS FOR COMPUTING AND COMMUNICATIONS IV, 2002, 4867 : 60 - 70
  • [25] Hardware implementation for a genetic algorithm
    Chen, Pei-Yin
    Chen, Ren-Der
    Chang, Yu-Pin
    Shieh, Leang-San
    Malki, Heidar A.
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2008, 57 (04) : 699 - 705
  • [26] A HARDWARE IMPLEMENTATION OF AN AUTOREGRESSIVE ALGORITHM
    SMITH, MR
    SMIT, TJ
    NICHOLS, SW
    NICHOLS, ST
    ORBAY, H
    CAMPBELL, K
    MEASUREMENT SCIENCE AND TECHNOLOGY, 1990, 1 (10) : 1000 - 1006
  • [27] Parallel Smith-Waterman algorithm hardware implementation for ancestors and offspring gene tracer
    Seliem, Asmaa G.
    Abou El-Wafa, Wael
    Galal, A. I. A.
    Hamed, Hesham F. A.
    2016 WORLD SYMPOSIUM ON COMPUTER APPLICATIONS & RESEARCH (WSCAR), 2016, : 116 - 121
  • [28] A Resource-Efficient Parallel Connected Component Labeling Algorithm and Its Hardware Implementation
    Zhao, Chen
    Gao, Wu
    Nie, Feiping
    IEEE TRANSACTIONS ON MULTIMEDIA, 2021, 23 (23) : 4184 - 4197
  • [29] A NEW FAST ONE-PASS THINNING ALGORITHM AND ITS PARALLEL HARDWARE IMPLEMENTATION
    CHEN, CS
    TSAI, WH
    PATTERN RECOGNITION LETTERS, 1990, 11 (07) : 471 - 477
  • [30] Optimization and hardware implementation of noise reduction algorithm for low-power audio chip
    Wang, Ang
    Yu, Lina
    Lan, Yuyan
    Zhou, Weixin
    Xiao, Wan'ang
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2022,