125 GBIT/S SILICON BIPOLAR 1-4-DEMULTIPLEXER IC

被引：7
|
作者：
ALBERS, JN [1 ]
LANGMANN, U [1 ]
LAO, ZH [1 ]
SCHLAG, E [1 ]
机构：
[1] ALCATEL SEL AG,RES CTR,W-7000 STUTTGART 31,GERMANY
来源：
ELECTRONICS LETTERS | 1992年 / 28卷 / 23期
关键词：
INTEGRATED CIRCUITS; DEMULTIPLEXERS; SILICON BIPOLAR TECHNOLOGY;
D O I：
10.1049/el:19921387
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A silicon bipolar 1:4-demultiplexer IC is presented which can be operated up to approximately 12.5 Gbit/s. The channels are aligned to the outputs by two external control signals. The 370 transistor chip was fabricated with an 0.4 mum emitter double polysilicon 21 GHz f(T) Si bipolar process and consumes approximately 1.9 W.
引用
收藏
页码：2160 / 2162
页数：3
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