HALF-MICRON LOCOS ISOLATION USING HIGH-ENERGY ION-IMPLANTATION

被引：0
|
作者：
SUZUKI, K
MAMENO, K
NAGASAWA, H
NISHIDA, A
FUJIWARA, H
YONEDA, K
机构：
来源：
IEICE TRANSACTIONS ON ELECTRONICS | 1992年 / E75C卷 / 09期
关键词：
ION IMPLANTATION; LOCOS; ISOLATION; CHANNEL STOP; ITF;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new channel stop design for submicron local oxidation of silicon (LOCOS) isolation was presented. The n-channel stop was designed with boron implantation after forming LOCOS, while the p-channel stop was constructed with high energy phosphorus or arsenic implantation before or after forming LOCOS. These optimized channel stop designs can extend an isolation spacing to the submicron region without a decrease in junction breakdown voltage and an increase in junction leakage current. Narrow channel effects were found to be effectively suppressed by optimum channel stop design issues.
引用
收藏
页码：972 / 977
页数：6
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