A VLSI SYSTEM FOR REAL-TIME LINEAR OPERATIONS AND TRANSFORMS

被引：1
|
作者：
NEWELL, M
RASURE, J
机构：
[1] Department of Electrical and Computer Engineering, University of New Mexico, Albuquerque
来源：
IEEE TRANSACTIONS ON SIGNAL PROCESSING | 1991年 / 39卷 / 08期
关键词：
D O I：
10.1109/78.91166
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A VLSI system utilizing sixteen systolic array multipliers and designed to compute vector-matrix products at a rate of 640 x 10(6) MAC's is presented. The 448 000-transistor, 1.6-mu-m CMOS device incorporates a dual timing scheme which allows multiplexing or hardware units over identical operations. This hardware sharing balances maximum internal operating frequency with external data bandwidth and results in an improved ratio of the signal throughput to silicon area. This system has wide application because of its ability to compute correlation, convolution, linear transforms, and connections in multilayer perceptrons.
引用
收藏
页码：1914 / 1917
页数：4
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