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- [25] STATE AND TIMING LOGIC ANALYSIS FITS ON A SINGLE CHIP ELECTRONIC PRODUCTS MAGAZINE, 1987, 30 (06): : 26 - 31
- [27] Low-power parallel video compression architecture for a single-chip digital CMOS camera JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1999, 21 (03): : 195 - 207
- [28] Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera Journal of VLSI signal processing systems for signal, image and video technology, 1999, 21 : 195 - 207