POLYCRYSTALLINE SILICON THIN-FILMS PROCESSED WITH SILICON ION-IMPLANTATION AND SUBSEQUENT SOLID-PHASE CRYSTALLIZATION - THEORY, EXPERIMENTS, AND THIN-FILM-TRANSISTOR APPLICATIONS

A review is presented of the self-implantation method which has been developed to achieve high-quality polycrystalline silicon thin films on insulators with enhanced grain sizes and its applications to thin-film transistors (TFTs). In this method, silicon ions are implanted into an as-deposited polycrystalline silicon thin film to amorphize most of the film structure. Depending on ion implantation conditions, some seeds with <110> orientation remain in the film structure due to channeling. The film is then thermally annealed at relatively low temperatures, typically in the range of 550-700-degrees-C. With optimized process conditions, average grain sizes of 1 mum or greater can be obtained. First, an overview is given of the thin-film transistor technology which has been the greatest motivation for the research and development of the self-implantation method. Then the mechanism of selective amorphization by the silicon self-implantation and the crystallization by thermal annealing is discussed. An analytical model and experimental results are described. Polycrystalline silicon TFTs fabricated using the self-implanted polycrystalline silicon thin-films are then reviewed. The high-quality polycrystalline silicon thin films processed with the self-implantation method results in excellent TFT characteristics for both n- and p-channel devices thereby allowing complementary metal-oxide-semiconductor integrated circuits. High mobilities of around 150 cm2/V s for n-channel TFTs and around 50 cm2/V s for p-channel TFTs as well as on-to-off current ratios of 1 x 10(8) have been achieved. Fabrication and characterization of polycrystalline silicon TFTs with channel dimensions comparable to or smaller than the grain size of polycrystalline silicon films are also described to present a case study to discuss the self-implantation process and associated technologies. Finally, new approaches that extend the self-implantation method to control grain-boundary locations are discussed. If grain-boundary locations can indeed be controlled, the self-implantation method will become even more valuable in developing future high-performance TFT integrated circuits.