FAST FREQUENCY-SYNTHESIS BY PLL USING A CONTINUOUS PHASE DIVIDER

被引：3
|
作者：
WULICH, D
机构：
[1] Ben-Gurion Univ of the Negev, Beer-Sheva, Isr, Ben-Gurion Univ of the Negev, Beer-Sheva, Isr
来源：
PROCEEDINGS OF THE IEEE | 1988年 / 76卷 / 01期
关键词：
CONTROL; ELECTRIC VARIABLES - Voltage - OSCILLATORS - PHASE LOCKED LOOPS;
D O I：
10.1109/5.3292
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A method of constructing a frequency synthesizer with a short settling time is suggested. The frequency synthesizer is based on a double-loop phase-locked loop which has a short convergence time and on a continuous-phase divider that matches the VCO (voltage-controlled oscillator frequency to the reference frequency. 6 refs.
引用
收藏
页码：85 / 86
页数：2
相关论文
共 50 条
12345