PROTOCOL VERIFICATION SYSTEM FOR SDL SPECIFICATIONS BASED ON ACYCLIC EXPANSION ALGORITHM AND TEMPORAL LOGIC

被引:0
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作者
SAITO, H
HASEGAWA, T
KAKUDA, Y
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TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper describes a system which verifies that the behaviors of a protocol specified in SDL meet requirements. Requirements are expressed using a branching-time temporal logic for a concise and unambiguous description. The verification system first generates a set of state transition graphs consisting of executable transitions, and then evaluates the branching-time temporal logic formula on the graphs. Using an extended acyclic expansion algorithm, the state transition graph is obtained for each process, while the existing verification methods use a global state transition graph that represents the behaviors of the whole protocol system consisting of all processes. Since only the graphs of the processes relevant to the requirements are examined, the verification can be executed more efficiently. The verification is illustrated in the paper by the verification of a broadcasting protocol for requirements such as fair termination among processes.
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页码:511 / 526
页数:16
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