UTILIZING LOW-LEVEL PARALLELISM IN GENERAL-PURPOSE CODE - THE HARP PROJECT

This paper describes how the distinctive features of the Hatfield RISC Processor (HARP) and its associated compilation techniques are combined to utilise the parallelism available in general purpose code. The overall aim of the HARP project is to produce a processor that can provide a sustained execution rate for non-scientific code in excess of one instruction per cycle. This goal will be accomplished by using a multiple pipelined processor and an optimising compiler. The compiler schedules short RISC-type instructions for the set of parallel pipelines and packs them into long instruction words. The processor fetches long instruction words from an instruction cache and passes the component short instructions through the multiple pipeline structure. The performance of the processor is increased by the use of conditional instruction execution. Conditional execution allows the compiler to schedule more instructions in parallel by overlapping instructions from consecutive basic blocks and by merging two or more blocks. © 1990.