AN EXTENDED SCHEDULING TECHNIQUE FOR SOFTWARE PIPELINING

Software pipelining is a practical and efficient loop scheduling technique used in generating efficient code for VLIW architectures, superscalar processors and microcode compaction for horizontal micro-architectures. Software pipelining allows exploitation of parallelism inside and across loop iterations. In this paper we propose an algorithm capable of generating an optimal schedule for initiating loop iterations with constant initiation interval. Extension of standard modulo scheduling technique provides the framework for including resource and precedence constraints. The proposed algorithm is based on generating the schedule from more than one loop iterations.