DONT OVERLOOK COMPATIBLE NAND AND NOR GATES IN REDUCING LOGIC

被引：0
|
作者：
FRENZEL, LE
机构：
来源：
CONTROL ENGINEERING | 1970年 / 17卷 / 10期
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：70 / &
相关论文
共 50 条
  • [1] Design of Compact Integrated Photonic Crystal NAND and NOR Logic Gates
    Pedraza Caballero, L. E.
    Povinelli, Michelle
    Ramirez, Jhonattan C.
    Guimaraes, Paulo
    Vilela Neto, Omar P.
    2020 23RD EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2020), 2020, : 420 - 427
  • [2] Enzyme-Based NAND and NOR Logic Gates with Modular Design
    Zhou, Jian
    Arugula, Mary A.
    Halamek, Jan
    Pita, Marcos
    Katz, Evgeny
    JOURNAL OF PHYSICAL CHEMISTRY B, 2009, 113 (49): : 16065 - 16070
  • [3] All-optical NAND / NOR logic gates using bistable switching
    Ali Rahmati
    Mohammad Ali Amandadi
    Pramana, 2019, 93
  • [4] All-optical NAND/NOR logic gates using bistable switching
    Rahmati, Ali
    Amandadi, Mohammad Ali
    PRAMANA-JOURNAL OF PHYSICS, 2019, 93 (06):
  • [5] Design and stability of NOR and NAND logic gates constructed with three quantum states
    Renaud, N.
    Joachim, C.
    PHYSICAL REVIEW A, 2008, 78 (06):
  • [6] Design and analysis of logic NOR, NAND and XNOR gates based on interference effect
    Sun Xiao-Wen
    Yang Xiu-Lun
    Meng Xiang-Feng
    Zhu Ji-Nan
    Wang Yu-Rong
    Yin Yong-Kai
    Dong Guo-Yan
    QUANTUM ELECTRONICS, 2018, 48 (02) : 178 - 183
  • [7] DESIGN OF OPTIMAL 2-LEVEL LOGIC NETWORKS USING NOR, AND, NAND, OR GATES
    FRISIANI, AL
    INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING EDUCATION, 1975, 12 (04) : 318 - 321
  • [8] Phenylhydrazones of Piperidin-4-ones as AND, OR, NOR, NAND, and INH Molecular Logic Gates
    Xavier, Joana May Chanayil
    Chandrasekaran, Sowrirajan
    Enoch, Israel V. Muthu Vijayan
    Gunasekaran, Venugopal
    APPLIED SPECTROSCOPY, 2013, 67 (09) : 1042 - 1048
  • [9] Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates
    Chvala, Ales
    Nagy, Lukas
    Marek, Juraj
    Priesol, Juraj
    Donoval, Daniel
    Satka, Alexander
    2019 14TH IEEE INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS 2019), 2019,
  • [10] HEURISTIC UNLOADING PROCEDURE FOR NAND AND NOR GATES
    DUBUS, D
    TOSSER, AJ
    INTERNATIONAL JOURNAL OF ELECTRONICS, 1978, 45 (02) : 147 - 159
12345