MULTISTACK OPTIMIZATION FOR DATA-PATH CHIP (MICROPROCESSOR) LAYOUT

被引：0
|
作者：
LUK, WK
DEAN, AA
机构：
来源：
26TH ACM/IEEE DESIGN AUTOMATION CONFERENCE | 1989年
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
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页码：110 / 115
页数：6
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