SYSTOLIC FREQUENCY-DIVIDERS COUNTERS

被引：12
|
作者：
PEKMESTZI, KZ
THANASOURAS, N
机构：
[1] National Technical University of Athens, Division of Computer Science, Department of Electrical Engineering, Athens
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1994年 / 41卷 / 11期
关键词：
D O I：
10.1109/82.331551
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The operation of systolic counters, based on the pipelining of the conventional binary counters, is examined. The application of these circuits in the implementation of frequency dividers/counters is also presented. The proposed systolic counters have small circuit complexity and permit very high speed operation.
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页码：775 / 776
页数：2
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