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- [8] Making a CPLD run faster than the system clock Australian Electronics Engineering, 1997, 30 (09):
- [9] A compact, low power, fully integrated clock frequency doubler ICECS 2003: PROCEEDINGS OF THE 2003 10TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2003, : 563 - 566
- [10] Method of realizing clock signal by CPLD during GPS desynchronization 2003, Automation of Electric Power Systems Press (27):