DIGITALLY ADJUSTABLE RESISTORS IN CMOS FOR HIGH-PERFORMANCE APPLICATIONS

被引:28
|
作者
GABARA, TJ
KNAUER, SC
机构
[1] AT&T Bell Laboratories, Murray Hill., NJ
关键词
D O I
10.1109/4.148326
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes how CMOS circuits can be adjusted digitally to generate controlled impedances for use in high-performance circuits. Since digital signals are the only inputs to these circuits, on-chip dc power dissipation can be reduced, the circuit can be made more robust, and the impedance of the circuit can be adjusted by manipulating the input digital information. In particular, a design of a CMOS series terminated line driver is discussed. Also described is the utilization of how this controlled impedance could be used in terminating transmission lines on-chip, constant delay lines, and controlled di/dt output buffers.
引用
收藏
页码:1176 / 1185
页数:10
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