GENERAL-PURPOSE INTERFACE BUS (GP-IB) DECODER

The development of a microprocessor-based general-purpose interface bus (GP-IB) decoder is presented in this paper. This decoder has been designed to provide up to 144 transistor-transistor logic (TTL) output lines. It is programmable and driven by the GP-IB/IEEE-488 interface of the controller. A Z80 microprocessor with its associated circuitry has been used to develop this decoder and thus it has got features associated with the microprocessor-based system designs. The GP-IB/IEEE-488 listener interface has been incorporated in the design. All functions performed by a decoder have been implemented by software developed in Z80 assembly language, which is stored in an EPROM. The EPROM-based firmware controls all the activities of the system. This decoder unit can be used for the switching matrix of any GP-IB-based automatic test system. It also eliminates the need for a digital 1/0 card in the controller.