MULTIPROCESSOR BUS IS READY TO MEET 32-BIT APPLICATIONS OF FUTURE

被引：0

|

作者：

BEASTON, J

机构：

来源：

ELECTRONICS | 1984年 / 57卷 / 06期

关键词：

D O I：

暂无

中图分类号：

学科分类号：

摘要：

引用

收藏

页码：126 / 131

页数：6

相关论文

共 50 条

[1] FUTURE BUS STRUCTURES FOR 32-BIT PERSONAL COMPUTERS
FINK, W
[J]. COMPUTER STANDARDS & INTERFACES, 1988, 8 (01) : 23 - 28
[2] MUP BUS GEARS UP TO A 32-BIT FUTURE
BALPH, T
KISTER, J
[J]. ELECTRONIC DESIGN, 1980, 28 (14) : 97 - 103
[3] COMPARING 32-BIT BUS STANDARDS
TESCHLER, L
[J]. MACHINE DESIGN, 1984, 56 (14) : 61 - 65
[4] A 32-BIT PROCESSOR ON A 16-BIT BUS
BUDZINSKI, M
[J]. CONTROL ENGINEERING, 1986, 33 (03) : 84 - 84
[5] 32-BIT CHIP BOWS WITH SUPPORT READY
JOHNSON, RC
[J]. ELECTRONICS-US, 1982, 55 (11): : 48 - +
[6] INTELS 32-BIT BUS CHALLENGES MOTOROLAS
BARNEY, C
[J]. ELECTRONICS-US, 1983, 56 (21): : 50 - +
[7] IEEE 32-BIT, BACKPLANE BUS COMPARISONS
SMOLIN, M
[J]. IEEE MICRO, 1988, 8 (03) : 5 - 7
[8] MULTIPROCESSOR ARCHITECTURES SPARK INTEREST IN 32-BIT BUSES
DALRYMPLE, R
[J]. MINI-MICRO SYSTEMS, 1984, 17 (15): : 177 - &
[9] THE 32-BIT BUS STANDARDS ISSUE REVISITED
BORILL, PL
[J]. IEEE MICRO, 1985, 5 (05) : 76 - &
[10] 32-BIT PROCESSOR ON A 16-BIT BUS.
Budzinski, Mark
[J]. Control engineering, 1986, 33 (03)

← 1 2 3 4 5 →