共 50 条
- [2] RELIABILITY OF HIGH-SPEED CMOS LOGIC IN THE PLASTIC DIL PACKAGE [J]. ELECTRONIC ENGINEERING, 1984, 56 (694): : 107 - &
- [3] PACKAGING TECHNOLOGY FOR MICROWAVE ICS AND HIGH-SPEED LOGIC [J]. ISSCC DIGEST OF TECHNICAL PAPERS, 1982, 25 : 218 - 219
- [4] High-Speed TLP and ESD Characterization of ICs [J]. 2021 IEEE BICMOS AND COMPOUND SEMICONDUCTOR INTEGRATED CIRCUITS AND TECHNOLOGY SYMPOSIUM (BCICTS), 2021,
- [7] Scalable model of on-wafer interconnects for high-speed CMOS ICs [J]. IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2006, 29 (04): : 770 - 776
- [10] A HIGH-SPEED BI-CMOS STANDARD LOGIC FAMILY [J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1987, 134 (03) : C126 - C126