TECHNIQUES AND METHODOLOGIES FOR MAKING SYSTEM-LEVEL ESD RESPONSE MEASUREMENTS FOR TROUBLESHOOTING OR DESIGN VERIFICATION

In the past, investigations of ESD problems in electronic equipment have often been done using a trial and error approach. In addition to requiring more time to find a fix, the margin of the fix was difficult to establish and often the fix did more than required to correct the problem at a correspondingly higher cost. This paper will introduce several methods of making measurements on electronic systems to determine their response to external interference such as that from ESD or Electrical Fast Transient, EFT. Experimental results are presented to show the effectiveness of the methods.