共 50 条
- [1] Verbesserung der Genauigkeit und Stabilitätseigenschaften von Power Hardware-in-the-Loop-Simulationen mittels einer Dual-Rate-SchnittstelleImprovement of accuracy and stability of Power Hardware-in-the-Loop Simulations via a dual-rate interface [J]. e & i Elektrotechnik und Informationstechnik, 2011, 128 (4) : 128 - 134
- [4] Quantifying the accuracy of hardware-in-the-loop simulations [J]. 2007 AMERICAN CONTROL CONFERENCE, VOLS 1-13, 2007, : 5549 - 5554
- [7] Improve the stability and the accuracy of power Hardware-In-the-Loop simulation by selecting appropriate interface algorithms [J]. 2007 IEEE CONFERENCE ON INDUSTRIAL AND COMMERCIAL POWER SYSTEMS-TECHNICAL CONFERENCE, 2007, : 135 - 141
- [8] An Effective Method for Evaluating the Accuracy of Power Hardware-in-the-Loop Simulations [J]. CONFERENCE RECORD 2008 IEEE INDUSTRIAL & COMMERCIAL POWER SYSTEMS TECHNICAL CONFERENCE, 2008, : 163 - 168
- [10] A Scheme to Improve the Stability and Accuracy of Power Hardware-in-the-Loop Simulation [J]. IECON 2020: THE 46TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2020, : 5027 - 5032