Design and Analysis of Low Power Memristor Based 6T-SRAM Cell with MTCMOS Technique

Now days low power devices are getting more attention in electronics field so recent year designers have designed devices in a way that they consumes less power but obstacles are in maintaining parameter like area, total power and leakage power to achieve system goal. Leakage power is attentive parameter to design low power devices because it plays a major role in increasing the Total power consumption of the devices. In this paper 6T SRAM (Static Random Access Memory) has been designed and parameters like Total power and leakage power has been calculated. SRAM is a type of memory that provides a link with CPU and designing of SRAM is very critical because it takes large part of power and area. In SRAM cell, major problem is that it is volatile in nature to avoid this characteristic of SRAM cell in this paper designed Memristor based SRAM. Memristor is a forth missing non-linear resistor which acts as memory. It is invented in 1971 by L. O. Chua and it is nonvolatile in nature this is the reason behind that Memristor based SRAM is nonvolatile in nature. To reduce leakage power and total power of Memristor based 6T SRAM applied MTCMOS (Multi Threshold CMOS) technique. Designing and calculation of parameters of simple SRAM, Memristor based SRAM and MTCMOS based SRAM has been done in 45 nm technologies with the operating voltage of 0.7 volt and that was done with cadence virtuoso tool.