共 50 条
- [1] State assignment and selection of types and polarities of flipflops, for finite state machine synthesis [J]. PROCEEDINGS OF THE IEEE INDICON 2004, 2004, : 27 - 30
- [2] Finite state machine state assignment for area and power minimization [J]. 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 5303 - +
- [3] State assignment of the finite state machine for PLD-implementation [J]. PROGRAMMABLE DEVICES AND SYSTEMS, 2000, : 203 - 208
- [5] Finite state machine state assignment targeting low power consumption [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2004, 151 (01): : 61 - 70
- [6] Low power state assignment and flipflop selection for finite state machine synthesis - a genetic algorithmic approach [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2001, 148 (4-5): : 147 - 151
- [7] Genetic algorithm based approach for integrated state assignment and flipflop selection in finite state machine synthesis [J]. ELEVENTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1997, : 522 - 527
- [10] State assignment of finite-state machines [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2000, 147 (01): : 15 - 22