MULTIPLE FAULT SIMULATION IN LINEAR ACTIVE CIRCUITS

被引：2
|
作者：
TEMES, GC [1 ]
机构：
[1] UNIV CALIF LOS ANGELES,DEPT ELECT SCI & ENGN,LOS ANGELES,CA 90024
来源：
ELECTRONICS LETTERS | 1976年 / 12卷 / 18期
关键词：
D O I：
10.1049/el:19760355
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：467 / 468
页数：2
相关论文
共 50 条
  • [1] FAULT SIMULATION OF LINEAR ANALOG CIRCUITS
    NAGI, N
    CHATTERJEE, A
    ABRAHAM, JA
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 1993, 4 (03) : 245 - 260
  • [2] Circuit equations for fast fault simulation and diagnosis of linear circuits
    INESC/IST, Lisboa, Portugal
    [J]. Proc IEEE Int Conf Electron Circuits Syst, (125-128):
  • [3] A method for multiple soft fault diagnosis of linear analog circuits
    Tadeusiewicz, Michal
    Halgas, Stanislaw
    [J]. MEASUREMENT, 2019, 131 : 714 - 722
  • [4] Macromodel Based Fault Simulation of Linear Circuits using Parameter Estimation
    Garje, K.
    Kumar, A.
    Biswas, S.
    Banerjee, A.
    Srikanth, P.
    Mukhopadhyay, S.
    [J]. IEEE REGION 10 COLLOQUIUM AND THIRD INTERNATIONAL CONFERENCE ON INDUSTRIAL AND INFORMATION SYSTEMS, VOLS 1 AND 2, 2008, : 191 - +
  • [5] A unified approach for fault simulation of linear mixed-signal circuits
    Balivada, A
    Zheng, H
    Nagi, N
    Chatterjee, A
    Abraham, JA
    [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 1996, 9 (1-2): : 29 - 41
  • [6] Multiple catastrophic fault diagnosis of linear circuits considering the component tolerances
    Tadeusiewicz, Michal
    Halgas, Stanislaw
    [J]. 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, 2009, : 647 - 650
  • [7] A Verification Technique for Multiple Soft Fault Diagnosis of Linear Analog Circuits
    Tadeusiewicz, Michal
    Ossowski, Marek
    [J]. INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2018, 64 (01) : 83 - 89
  • [8] MULTIPLE STUCK-FAULT DETECTION AND LOCATION IN MULTIVALUED LINEAR CIRCUITS
    CHEN, CL
    DU, MW
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1986, 35 (12) : 1068 - 1071
  • [9] SFG Based Fault Simulation of Linear Analog Circuits Using Fault Classification and Sensitivity Analysis
    Bhattacharya, Rahul
    Ragamai, S. H. M.
    Kumar, Subindu
    [J]. VLSI DESIGN AND TEST, 2017, 711 : 179 - 190
  • [10] MULTIPLE STUCK-FAULT DETECTION AND LOCATION IN MULTIVALUED LINEAR CIRCUITS.
    Chen, Chuen-Liang
    Du, Min-Wen
    [J]. IEEE Transactions on Computers, 1986, C-35 (12) : 1068 - 1071
12345