LOW DEFECT DENSITY INSULATING FILMS DEPOSITED ON ROOM-TEMPERATURE SUBSTRATES

被引:12
|
作者
MAGERLEIN, JH
BAKER, JM
PROTO, GR
GREBE, KR
KLEPNER, SP
PALMER, MJ
WARNECKE, AJ
机构
[1] IBM, Thomas J. Watson Research Cent,, Yorktown Heights, NY, USA, IBM, Thomas J. Watson Research Cent, Yorktown Heights, NY, USA
来源
关键词
ELECTRIC INSULATING MATERIALS - Thin Films - INTEGRATED CIRCUITS - Materials;
D O I
10.1116/1.582854
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Several types of thin dielectric films which can be deposited on substrates held near room temperature have been tested for use as insulators in integrated circuit structures. The types of insulation studied include single and double layer SiO films, Parylene polymer films, and SiO/Parylene composites. Test structures, which were fabricated with processes used in Josephson integrated circuits, allowed measurement of the number of electrical defects per unit area in the insulation between two Pb-Ln-Au films as well as the number of defects along edges of the lower metal film. The SiO/Parylene composite films had the lowest defect densities, as low as 0. 2 cm** minus **2 over planar metal layers and 0. 001 cm** minus **1 at insulated metal edges. Defect densities below those for single SiO films were also obtained by depositing the SiO in two layers through separate but identical lift-off stencils.
引用
收藏
页码:636 / 640
页数:5
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