This paper presents the standardised VHDL digital hardware description language. VHDL is a language for describing digital electronic systems. It arose out of the United States Government's Very High Speed Integrated Circuits (VHSIC) program, initiated in 1990. There was a need for standard language for describing the structure and function of integrated circuits (ICs). Hence the VHSIC Hardware Description Language (VHDL) was developed, and subsequently adopted as a standard by the Institute of Electrical and Electronic Engineers (IEEE). VHDL is designed to fill a number of needs in the design process. Firstly, it allows description of the structure of a design, that is how it is decomposed into sub-design, and how those sub-designs are interconnected. Secondly, it allows the specification of the function of designs using familiar programming language constructs. Thirdly, as a result, it allows a design to be simulated before being manufactured, so that designers can quickly compare alternatives and test for correctness without the delay and expense of hardware prototyping. A history of VHDL can be separated into three phases: the definition phase, the development phase and the deployment phase. In the definition phase the basic concepts and elements that form the character of the hardware description language were defined. At the same time the academic and industrial environments necessary for the eventual acceptance of VHDL as an industry standard were cultivated. The principal activity of the development phase has been the development of software to support the use of VHDL for electronic product design and documentation. After successful development the deployment phase began. In this phase VHDL can be widely used in industry, university education and research. The final version of the language, known as VHDL Version 7.2, was made available and standardised by IEEE as IEEE Standard 1076 in 1985 and 1987, respectively. In 1992 IEEE revised the standard. Some new features in signal assignment, new predefined operators, functions and attributes, and detailed specified timing model needed for the simulation cycle were added. These revisions were accepted as IEEE-1076-1993 standard. Circuit description in VHDL can be behavioural and/or structural. Each kind of description covers different abstraction levels, from the architecture level down to the logic level. The full set of design representations that a VHDL can specify is described in the followig matrix. [GRAPHICS] VHDL represents the full behavioural and structural domains. The behavioural domain describes what a circuit or device must do. The structural domain describes a component's logical layout: partitioning, decomposition (hierarchy), and interconectivity. The main advantages of VHDL are: public availability, different design methodology and technology support, technology and process independence, wide range of descriptive capability, design exchange, modularity, design reuse and USA government support. A few years ago VHDL was used only in academic societies, but now powerful tools for making integrated circuits that use VHDL entry description are available. The advantage of VHDL in comparison to other hardware description languages is that VHDL is standardised by IEEE and it is in public availability. Currently, VHDL analog extensions are under development,
