OPTIMAL LAYOUT RECYCLING BASED ON GRAPH-THEORETIC LINEAR-PROGRAMMING APPROACH

被引：0

作者：

SHIGEHIRO, Y ^{[1
]}

NAGATA, T ^{[1
]}

SHIRAKAWA, I ^{[1
]}

KAMBE, T ^{[1
]}

机构：

[1] SHARP CO LTD,CTR PROD TECHNOL DEV,DEPT 4,TENRI,NARA 632,JAPAN

来源：

VLSI 93 | 1994年 / 42卷

关键词：

DESIGN AIDS; VLSI SYSTEM; LANGUAGES AND SYSTEMS;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The present paper describes an automatic recycling scheme for layout resources once used dedicatedly for the functional cell generation in the standard cell design approach. The main subject of this scheme is (i) to transform given layout data into a layout description format expressed in layout parameters, and then (ii) to realize an optimal layout by means of a graph theoretic simplex method. A part of implementation results is also shown.

引用

页码：25 / 34

页数：10

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