REALIZATION OF QUATERNARY LOGIC-CIRCUITS BY N-CHANNEL MOS DEVICES

被引：58

作者：

YASUDA, Y

TOKUDA, Y

ZAIMA, S

PAK, K

NAKAMURA, T

YOSHIDA, A

机构：

[1] Toyohashi Univ of Technology, Jpn, Toyohashi Univ of Technology, Jpn

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1986年 / 21卷 / 01期

关键词：

D O I：

10.1109/JSSC.1986.1052493

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：162 / 168

页数：7

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