Incremental Verification for On-the-Fly Controller Synthesis

被引:1
|
作者
Musliner, David J. [1 ]
Pelican, Michael J. S. [1 ]
Goldman, Robert P. [2 ]
机构
[1] Honeywell Labs, Minneapolis, MN 55413 USA
[2] SIFT LLC, Minneapolis, MN 55401 USA
关键词
Incremental Verification; Controller Synthesis; Model Checking; Planning;
D O I
10.1016/j.entcs.2005.07.027
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The CIRCA system automatically synthesizes hard real-time discrete event controllers from plant and environment descriptions. CIRCA's automatically-synthesized controllers provide guaranteed real-time performance and safety preservation in adversarial, non-closed-world domains. By separating controller construction from formal controller verification, CIRCA makes controller synthesis decisions in a time-abstract state space that is quite compact. However, controller verification requires a more complete consideration of time, to make real-time performance guarantees. By retaining information between verifications of partial controllers during the controller synthesis process, the incremental verification methods that we present here dramatically reduce the complexity of controller synthesis. We provide formal characterizations of our incremental verification technique and performance results demonstrating up to a 97% reduction in controller synthesis time using these methods.
引用
收藏
页码:71 / 90
页数:20
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