NEW CLASSES OF MAJORITY-LOGIC DECODABLE DOUBLE ERROR CORRECTING CODES FOR COMPUTER MEMORIES

A new class of (m2 + 3m + 1, m2) 1-step majority-logic decodable double error correcting codes(1-step DEC codes) is described, where m is an odd integer. Combining this code with properly constructed (m + 1 + k1, k1) and (m, k2) 1-step DEC codes, a (m2 + 3(m + k1) + 1, m2 + 3k1) 1-step DEC code and a (m2 + 3(m - k2) + 1, m2) 2-step majority-logic decodable DEC code(2-step DEC code) are obtained, respectively. Considering computer memory applications, some practical 1- and 2-step DEC codes with data-bit lengths of 24, 32, 64 and 72 are obtained by shortening the new codes, and are compared to existing majority-logic decodable DEC codes. It is shown that, for given data-bit lengths, new 2-step DEC codes have much better code rates than self- orthogonal DEC codes but slightly worse code rates than existing 2-step majority-logic decodable cyclic DEC codes (2-step cyclic DEC codes). However, parallel decoders of new 2-step DEC codes are much simpler than those of exisiting 2-step cyclic DEC codes, and are nearly as simple as those of 1-step DEC codes.