HIGH-SPEED DYNAMIC REFERENCE VOLTAGE (DRV) CMOS/ECL INTERFACE CIRCUITS

被引：0

作者：

GU, RX

ELMASRY, MI

机构：

[1] The VLSI Research Group, The Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1994年 / 29卷 / 10期

基金：

加拿大自然科学与工程研究理事会;

关键词：

D O I：

10.1109/4.315215

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper introduces a circuit technique to increase the operating speed of CMOS/ECL interface circuits. The technique is based on shifting the reference voltage dynamically to follow the ECL input signal. HSPICE simulation results based on a 0.8-mu m BiCMOS technology show the advantages of DRV CMOS/ECL in terms of speed and noise margins. An analytical delay model which fits HSPICE simulation results is addressed. The error between the model and the circuit simulator is within 4%.

引用

页码：1282 / 1287

页数：6

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