THE FORMAL DESCRIPTION AND VERIFICATION OF HARDWARE TIMING

被引:11
|
作者
MILNE, GJ
机构
[1] HardLab, Department of Computer Science, University of Strathclyde, Glasgow G1 1XH, Scotland
关键词
BEHAVIORAL MODELS; FORMAL PROOF; HARDWARE DESCRIPTION LANGUAGES; HARDWARE VERIFICATION; LOGIC DESIGN; TIMING ANALYSIS; VLSI DESIGN VALIDATION;
D O I
10.1109/12.83619
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A formalism in which timing properties of digital hardware may be specified, derived, and formally verified is introduced as a rigorous theory for hardware timing. This approach to reasoning about time differs from current work in that a rigorous modeling framework has been used to create a family of related verification techniques rather than a single timing analysis tool. This framework is based on a model of interacting finite state machines called CIRCAL, a formalism developed for the purpose of describing and validating complex concurrent systems. Its application to digital hardware and the problems associated with timing verification illustrate the utility of a formal approach to hardware description and verification. In this approach to hardware timing analysis, the presence of a composition operator is all pervasive. It provides a single, uniform mechanism for describing the behavior of interacting hardware modules and for establishing and describing the timing properties of such modules. CIRCAL provides us with a proof mechanism for conducting formal hardware verification based on an equivalence relation between CIRCAL terms. This permits the required timing properties of a hardware module to be specified and then formally verified.
引用
收藏
页码:811 / 826
页数:16
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