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- [3] Scale Length Determination of a Fully Depleted Surrounding Gate (Rectangular Cross Section) Junction Less Transistor 2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,
- [4] Analytical Modeling of Threshold Voltage of a Double Gate Junction Less Field Effect Transistor 2013 2ND INTERNATIONAL CONFERENCE ON ADVANCES IN ELECTRICAL ENGINEERING (ICAEE 2013), 2013, : 111 - 114
- [6] Scale Length Determination of Gate All Around (Regular Pentagonal Cross Section) Fully Depleted Junction Less Transistor 2014 INTERNATIONAL CONFERENCE ON ADVANCES IN ENGINEERING AND TECHNOLOGY RESEARCH (ICAETR), 2014,