High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation

被引：0
|
作者：
J.-A. Piñeiro
M. D. Ercegovac
J. D. Bruguera
机构：
[1] University of Santiago de Compostela,Department of Electronic and Computer Engineering
[2] University of California,Computer Science Department
[3] Los Angeles (UCLA),Department of Electronic and Computer Engineering
[4] University of Santiago de Compostela,undefined
来源：
Journal of VLSI signal processing systems for signal, image and video technology | 2005年 / 40卷
关键词：
logarithm; digit-recurrence; high-radix; selection by rounding; computer arithmetic;
D O I：
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中图分类号：
学科分类号：
摘要：
A high-radix digit-recurrence algorithm for the computation of the logarithm, and an analysis of the tradeoffs between area and speed for its implementation, are presented in this paper. Selection by rounding is used in iterations j ≥ 2, and by table look-up in the first iteration. A sequential architecture is proposed, and estimates of the execution time and hardware requirements are obtained for n = 16, 24, 32, 53 and 64 bits of precision and for radix values from r = 8 to r = 1024. These estimates are obtained according to an approximate model for the delay and area of the main logic blocks. We show that the most efficient implementations are obtained for radices ranging from r = 32 to r = 256, reducing the execution time by half with respect to a radix-4 implementation with redundant arithmetic.
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页码：109 / 123
页数：14
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