VLSI Architecture of Modified Complex Harmonic Wavelet Transform

The complex harmonic wavelet (CHW) for the discrete signal is orthogonal, compact support in the frequency domain but is not complex conjugate symmetric for positive and negative half-planes. The modified complex harmonic wavelet (MCHW) transform is the improved version of CHW as it is the complex conjugate symmetry along with other desired properties of CHW such as orthogonality, and compact support in the frequency domain. Due to the complex conjugate symmetry, MCHW has lesser computational complexity compared to CHW. This paper introduces a new VLSI architecture for MCHW for hardware implementation and prototyped on a commercially available virtex5 field-programmable gate array (FPGA). For the validation of the proposed implementation, the real-time captured results in the logic analyzer are verified with simulation results. The maximum operating frequency targeting the above-mentioned FPGA device is reported as 92.82 MHz. The total on-chip power of the above implementation is 1.117W, out of which 84 mW is the dynamic power dissipation at a toggle rate of 12.5 %. Finally, for the area utilization of the above implementation, its resource utilization targeting the above FPGA device is reported.