Design and Implementation of an Improved Variable Step-Size NLMS-Based Algorithm for Acoustic Noise Cancellation

In adaptive filters, variable step-size-based algorithms have demonstrated better performance than conventional least mean square (LMS) and normalized LMS (NLMS) algorithms in terms of convergence speed, mean square error (MSE), and signal-to-noise ratio (SNR) improvement. Recently, adaptive filters have been recommended to be implemented on field programmable gate array (FPGA) devices due to their flexibility and high speed. Thus, recent research has focused on not only the performance measures of the algorithm but also on the required area, operating frequency, and power consumed to evaluate the proposed design after implementation. This paper first demonstrates the superiority of the regularized square root absolute error LMS (R-SRAE-LMS) for acoustic noise cancellation compared to other variable step size algorithms through a comparative study. Furthermore, transient and steady state analyses are discussed for the R-SRAE-LMS algorithm. Then, a detailed design of the R-SRAE-LMS adaptive filter is proposed in this paper. The design is divided into a forward path and two feedback paths. The device utilization, operating frequency and power consumption are also presented after a complete FPGA implementation process. The results show that R-SRAE-LMS has a high and stable SNR improvement curve compared to that of other acoustic noise cancellation algorithms. Moreover, the proposed design has remarkable implementation results compared to those of other variable step size adaptive filter designs. The output signal of the implemented proposed filter design attains performance measures very close to those of the fixed-point case.