A survey of FPGA-based accelerators for convolutional neural networks

被引：4
|
作者：
Sparsh Mittal
机构：
[1] Indian Institute of Technology,Department of Computer Science and Engineering
来源：
Neural Computing and Applications | 2020年 / 32卷
关键词：
Deep learning; Neural network (NN); Convolutional NN (CNN); Binarized NN; Hardware architecture for machine learning; FPGA; Reconfigurable computing; Parallelization; Low power;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
Deep convolutional neural networks (CNNs) have recently shown very high accuracy in a wide range of cognitive tasks, and due to this, they have received significant interest from the researchers. Given the high computational demands of CNNs, custom hardware accelerators are vital for boosting their performance. The high energy efficiency, computing capabilities and reconfigurability of FPGA make it a promising platform for hardware acceleration of CNNs. In this paper, we present a survey of techniques for implementing and optimizing CNN algorithms on FPGA. We organize the works in several categories to bring out their similarities and differences. This paper is expected to be useful for researchers in the area of artificial intelligence, hardware architecture and system design.
引用
收藏
页码：1109 / 1139
页数：30
相关论文
共 50 条
  • [1] A survey of FPGA-based accelerators for convolutional neural networks
    Mittal, Sparsh
    NEURAL COMPUTING & APPLICATIONS, 2020, 32 (04): : 1109 - 1139
  • [2] A survey of graph convolutional networks (GCNs) in FPGA-based accelerators
    Procaccini, Marco
    Sahebi, Amin
    Giorgi, Roberto
    Journal of Big Data, 2024, 11 (01)
  • [3] [DL] A Survey of FPGA-based Neural Network Inference Accelerators
    Guo, Kaiyuan
    Zeng, Shulin
    Yu, Jincheng
    Wang, Yu
    Yang, Huazhong
    ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, 2019, 12 (01)
  • [4] Optimisation of FPGA-Based Designs for Convolutional Neural Networks
    Bonifus, P. L.
    Thomas, Ann Mary
    Antony, Jobin K.
    SMART SENSORS MEASUREMENT AND INSTRUMENTATION, CISCON 2021, 2023, 957 : 209 - 221
  • [5] FPGA-Based Acceleration for Bayesian Convolutional Neural Networks
    Fan, Hongxiang
    Ferianc, Martin
    Que, Zhiqiang
    Liu, Shuanglong
    Niu, Xinyu
    Rodrigues, Miguel R. D.
    Luk, Wayne
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (12) : 5343 - 5356
  • [6] An FPGA-Based Processor for Training Convolutional Neural Networks
    Liu, Zhiqiang
    Dou, Yong
    Jiang, Jingfei
    Wang, Qiang
    Chow, Paul
    2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT), 2017, : 207 - 210
  • [7] Convolutional Neural Networks using FPGA-based Pipelining
    Ali G.A.
    Ali A.H.
    Iraqi Journal for Computer Science and Mathematics, 2023, 4 (02): : 215 - 223
  • [8] An Efficient FPGA-Based Architecture for Convolutional Neural Networks
    Hwang, Wen-Jyi
    Jhang, Yun-Jie
    Tai, Tsung-Ming
    2017 40TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP), 2017, : 582 - 588
  • [9] Using Data Compression for Optimizing FPGA-Based Convolutional Neural Network Accelerators
    Guan, Yijin
    Xu, Ningyi
    Zhang, Chen
    Yuan, Zhihang
    Cong, Jason
    ADVANCED PARALLEL PROCESSING TECHNOLOGIES, 2017, 10561 : 14 - 26
  • [10] FPGA-based Accelerator for Losslessly Quantized Convolutional Neural Networks
    Sit, Mankit
    Kazami, Ryosuke
    Amano, Hideharu
    2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT), 2017, : 295 - 298
12345